The present invention relates to a detector circuit for detecting high frequency signal power. In particular, it relates to a high frequency power detector circuit useful for automatic gain control and automatic power level control in radio communication devices.
In recent years, cellular phone terminals have been provided with various radio communication functions such as digital television, FM radio, Bluetooth® and wireless LAN in addition to a telephone function. In order to meet increasing demand for reduction in size and cost of radio communication terminals and modules included in them, integration of high performance circuit systems, which have not been integrated so far, has been proceeding on a radio communication chip. A high frequency signal power detector circuit (a high frequency power detector circuit) is an example of the high performance circuit systems.
In radio communication devices, a high frequency power detector circuit is used for automatic gain control in an amplifier and a mixer on a receiving system based on the intensity of a received signal input from an antenna, and for automatic gain control in a power amplifier on a transmission system by detecting an output signal level of the power amplifier. Such automatic control systems are incorporated in most of radio communication transmitters/receivers to achieve highly reliable radio communication.
In general, automatic gain control is performed based on the results of comparison between a reference signal generated in an integrated circuit (IC) and an output signal of an envelope detector circuit. Therefore, the precision of the control system depends on the precision of the internally generated reference signal and the output signal of the envelope detector circuit. For this reason, if reduction in supply voltage and increase in variation in the course of manufacture associated with the shrink of semiconductor design rules take place, signals received at an IC of a radio communication transmitter/receiver are distorted and a significant amount of noise is contained in the signal. As a result, radio communication quality is impaired.
The rapidly spreading digital terrestrial television broadcasting for mobile units (ISDB-T, so-called one segment broadcasting) is characterized in that a broadband radio communication band is used. In many cases, cellular phones are equipped with an IC for receiving the one segment broadcasting. Therefore, even if a high frequency filter is provided between the antenna and a tuner intended for the one segment broadcasting, various kinds of interference waves in and out of the band are input into the tuner through the antenna or by inner radiation. For improved communication quality, it is necessary to dynamically switch the power detection level based on a received channel or a radio wave condition. This brings about a need of realizing an inexpensive high frequency power detector circuit having higher precision as compared with conventional ones, while a semiconductor process under finer design rules is employed, though which results in significant variations in the course of manufacture. Further, in view of reduced product life cycle, an easy-to-design detector circuit which eliminates the need of adjustment of variations in the course of manufacture before shipment as much as possible has been demanded.
In many cases, an envelope detector circuit mainly consisting of a transistor, a current source and a capacitance is used in a conventional high frequency power detector circuit (see, for example, Stephen L. Wong and Sifen Luo, “A 2.7-5.5 V, 0.2-1 W BiCMOS RF Driver Amplifier IC with Closed-Loop Power Control and Biasing Functions,” IEEE JOURNAL OF SOLID STATE CIRCUITS, VOL. 33, NO. 12, DECEMBER 1998, pp. 2259-2264). Further, for reduction of detection error, a high frequency power detector circuit in which a DC reference voltage is converted to an AC (square wave) reference voltage has been proposed (see, for example, International Patent Publication No. WO/2004/040795).
FIG. 5 shows the structure of a conventional high frequency power detector circuit. An input high frequency signal is input to a base of a transistor 21 of an envelope detector circuit 2 after the center level of the input high frequency signal is shifted by a level shifter 1. In the envelope detector circuit 2, a collector of the transistor 21 is connected to a supply voltage node. A current source 22 and a capacitative element 23 are connected in parallel between an emitter and a ground node. When a capacitance value of the capacitative element 23 is increased to a sufficient degree, an envelope of the high frequency signal input to the base of the transistor 21 is extracted from the emitter.
In the same manner as the envelope detector circuit 2, an envelope detector circuit 3 includes a transistor 31 and a current source 32 and a capacitative element 33 connected in parallel to an emitter of the transistor 31. A reference voltage generated in a reference voltage generating circuit 4 is applied to a base of the transistor 31, and a reference signal is output from the emitter. A low-pass filter 5 outputs the results of high frequency signal power detection based on a difference between the outputs from the envelope detector circuits 2 and 3. The reference voltage generating circuit 4 is configured to generate a reference voltage corresponding to a power to be detected by changing a DC reference voltage Vref so that multiple levels of power are detected. In this way, a high frequency power detector circuit is constructed by the envelope detector circuit 2 and its replica (envelope detector circuit 3) with the aim of reducing variations in detected output due to temperature, supply voltage and variations in threshold value of the transistor in the course of manufacture.